Manufacture of modern integrated circuits is remarkably complex and involves hundreds of individual steps. The cleanliness and precision of each of the hundreds of steps is typically critical to providing a sufficiently high yield rate. A semiconductor wafer will generally be diced into hundreds if not thousands of die. Each die contains numerous transistors and other devices. Inevitably, flaws or errors introduce faults in some of the die so that they are rejected. The testing of the die can occur prior to dicing so that the bad circuits that are identified may be discarded prior to packaging.
To monitor such a complex process, it is conventional to implement a plurality of “inspection layers.” In that regard, semiconductor manufacture involves many individual steps as mentioned above. For example, a modern CMOS die may include eight or more metal layers. The metal layers are patterned to form traces or leads that carry the signaling between the die's transistors, power and ground, as well as for communication with external devices. The metal layers, which are insulated by intervening dielectric layers, are coupled together through vias that extend through the dielectric layers. The formations of the metal layers and vias are typically followed by corresponding inspection steps. The patterned metal layers and vias are imaged using a variety of means such as laser imaging, visible light cameras, infrared cameras, and so on. The resulting images are then processed with machine vision to identify flaws or defects. The combination of the imaging and image processing forms an “inspection layer.” There may be many inspection layers during the course of manufacturing. One can well appreciate that they need not be limited to the construction of the various metal layers and vias but also with regard to the photolithographic and other steps that occur during patterning, implantation, and diffusion of the active devices into the semiconductor substrate.
The inspection layers present a wealth of data that may be mined to identify “troublesome” or dispositive defects. In that regard, a defect identified in an inspection layer may be innocuous such that the resulting integrated circuit is still functional despite the flaw identified in the inspection layer. For example, a line formed in a metal layer may deviate undesirably but not sufficiently to short or cause other issues that result in malfunction. Thus, it is known to correlate flaws identified in the inspection layers with the fault testing of the die. Those flaws that correlate strongly with faults thus point to problems in the corresponding manufacturing step. Wafer manufacturing is quite expensive so that adjustments made that result in better yield may provide dramatic cost savings for a semiconductor manufacturer. However, current attempts at correlating inspection layer defects have not employed statistics and the use of confidence to extract likely cases of defects causing die failure. For example, conventional analyses fail to consider the absolute scale of numbers, which has a strong impact on statistics and confidence. In that regard, a given wafer may have a certain number of dies that fail. The same wafer has a number of die with identified defects. For example, suppose that the die with identified defects constitute 10% of the total number of die on the wafer and that percentage of failed die also constitutes 10% of the total number of die on the wafer. If the defects are entirely random without correlation to the failure, one would expect that the total number of failed die with defects would be 10% of 10% of the total number of die on the wafer. In other words, one would expect 1% of the total number of die to be both failing die and defect-containing die in such a purely random case. But it may be the case that the defect distribution is correlated with the failing die distribution. Conventional die defect analysis techniques do not use statistics to distinguish between such random defect distributions and dispositive defect distributions.
Accordingly, there is a need in the art for improved inspection layer correlation techniques.
Embodiments of the present disclosure and their advantages are best understood by referring to the detailed description that follows. It should be appreciated that like reference numerals are used to identify like elements illustrated in one or more of the figures.